Memory is one type of integrated circuitry, and is used in systems for storing data. Memory is usually fabricated in one or more arrays of individual memory cells. A memory bit is the smallest unit of information retained in a memory array. Each memory cell may correspond to a single memory bit having two different selectable states. In a binary system, the states are considered as either a “0” or a “1”.
Resistive random access memory (RRAM) is a class of memory that is of interest for utilization in existing and future data storage needs. RRAM utilizes programmable material having two or more stable states that differ in resistivity relative to one another. Example types of memory cells that may be utilized in RRAM are phase change memory (PCM) cells, programmable metallization cells (PMCs), conductive bridging random access memory (CBRAM) cells, nanobridge memory cells, electrolyte memory cells, binary oxide cells, and multilayer oxide cells (for instance, cells utilizing multivalent oxides). The memory cell types are not mutually exclusive. For example, CBRAM and PMC are overlapping classification sets.
An example prior art RRAM cell 10 is shown in FIG. 1 as transitioning between two memory states. One of the memory states is a high resistance state (HRS) and the other is a low resistance state (LRS). The memory cell comprises programmable material 16 between a pair of electrodes 12 and 14. The programmable material may be a single homogeneous composition (as shown) or may comprise two or more discrete layers.
The electrode 12 is connected to circuitry 18, and the electrode 14 is connected to circuitry 22. Circuitries 18 and 22 may include sense and/or access lines coupled to the electrodes, and configured for providing appropriate electric fields across the memory cell during read/write operations. In some embodiments, the illustrated memory cell may be one of a plurality of memory cells of a memory array, and the circuitries 18 and 22 may be part of a circuit configuration utilized to uniquely address each of the memory cells of the array. In some embodiments, a “select device” (not shown) may be provided adjacent the memory cell 10 to reduce undesired current leakage to and/or from the memory cell during utilization of the memory cell in a memory array. Example select devices include diodes, transistors, ovonic threshold switches, etc.
Application of electric field EF(+) across the memory cell 10 forms a current conducting transitory structure 20 extending through material 16. The transitory structure 20 provides a low-resistance current conduction path through cell 10; and thus formation of structure 20 transitions the cell to the LRS configuration.
Application of electric field EF(−) degrades the structure 20, and returns cell 10 to the HRS configuration. The electric field EF(−) may be of opposite polarity to the electric field EF(+).
The transitory structure 20 may have numerous configurations depending on the nature of the memory cell and of the programmable material, and depending on the chemistry and physics involved in formation of the transitory structure. For instance, the transitory structure may be a current conducting filament of ionic particles (the ionic particles may be super-ionic clusters, individual ions, etc.). As another example, the transitory structure may comprise a region of changed phase, altered vacancy concentration, altered ion concentration (for instance, altered oxygen ion concentration), etc.; which may or may not be part of a filament.
The memory cell 10 may be programmed by providing appropriate voltage across the memory cell to transition from the HRS configuration to the LRS configuration or vice versa. The memory cell may be read by providing suitable voltage across the memory cell to determine a resistance through the memory cell, while limiting the voltage to a level which does not cause programming of the memory cell.
Difficulties may be encountered during operation of memory cells of an RRAM array due to variation of operational characteristics of the cells across the array. It is desired to develop methods and structures which address such difficulties.